While writing a piece of software I got this thought about a feature that could be provided in programming languages (at least I am not aware of any language which has this feature)
Usually when we want to assign a value of a variable “a” to another variable say “b” all we do is write
Now consider this case. Suppose we want to assign the value of variable “a” to “b” if “c” equals 1 OR else we want to assign “d” to “b”, then we write
an easier way to write the above code would be to use a ternary operator as
Now consider another scenario, where we want to assign “a” to “b” if “c” equals 1 OR we want to assign “a” to “e”
Oops then we cant use the ternary operator, instead we have to fallback to our old friend “if.. else” as
Now wouldnt it be nice if this could be achieved using something like
a#(c==1?b:e) where # is the reverse assignment operator which assigns LHS to RHS !
so here if c==1 then # would assign “a” to “b” else it would assign “a” to “e” !!!
Just some crazy thoughts
well, its bouncing off my head…
it would be great if you could give a high level view of this please….
else i need to do googling :(
The value of b when c~=1 should continue be whatever it is currently! isnt that possible? like (0 0) in SR latch? or am I talking something crap, bcos I am not an electronics student :)
well i guess you are aware of a multiplexer. a simple example of a 2×1 mux assigns one of the two inputs to the single output depending on select line. that is what the conditional operator does. if we code this using a hardware descriptive language, like VHDL or verilogthe language synthsisers will implement the logic to a multiplexer.
the second thought of a reverse assignment doesnt acutally happen in circuit(at least not a good method of implementation). although the thought is interesting, but the ciruit will be unstable. that is becuase, there are two outputs. and in digital logic, any output should always be either 0 or 1. but when we look into the second expression the two ouptus are getting the value of the input on a select line, and the state of a particular output when there is no select line is unkown. for eg., if c=1, then b=a. but what is the value of b when c~=1 is unknown. thus there is an ambiguity and when we try to synthesis such logic, and we get latches where the older value of b gets latched. although theoretically lathces may seem OK for design, but are not preferred practically.
Infact this is the reason why we dont find any general expressions(ternary operator kind of) for the second logic.
i didnt got that…
could u explain how assignments happen in circuit level…
good thought man…
in that case, for many of my methods, i would ask for an operator :P
kaushik…more light on your comments please…
oh yes, that would have been great sainath.. but it doesnt wrk now :(
the first condition is a multiplexer. the second one is a de-multiplexer. in circuit level, the second eq is just two latches. anyways, good thought.
or can we do it like this (c==1?b:e)=a…perfect reverse assignment..or is it like this already i dont remember…